2-D Nanotech Material for Computer Chips

Two-dimensional material-based transistors are being extensively investigated for CMOS (complementary metal oxide semiconductor) technology extension; nevertheless, downscaling appears to be challenging owing to high metal-semiconductor contact resistance. Two-dimensional (2D) nano-materials could be a replacement for conventional CMOS semiconductors for high-speed integrated circuits and very low power usage. CMOS is reaching the physical limits of about…
2-D Nanotech Material for Computer Chips


Two-dimensional material-based transistors are being extensively investigated for CMOS (complementary metal oxide semiconductor) technology extension; nevertheless, downscaling appears to be challenging owing to high metal-semiconductor contact resistance.

Two-dimensional (2D) nano-materials could be a replacement for conventional CMOS semiconductors for high-speed integrated circuits and very low power usage. CMOS is reaching the physical limits of about 1 nanometer circuits.

Lab performance of these devices has been found to meet the international roadmap for devices and systems (IRDS) requirements for several benchmark metrics.

A doping-free transistor architecture, which exploits an inherent chemical property of MXene to provide intrinsically low-resistive contact at the source and drain terminal. The concept is validated by high-throughput screening of appropriate functional groups and self-consistent quantum transport calculations. Comparison with technology roadmap specifications hints that such a functional-engineered MXene device may provide a technology downscaling solution for 2D transistors. The high-throughput methodology could be extended to multi-metal-layer MXenes, to discover suitable semiconductor-metal combinations for superior performance.

Researchers propose a functional group-engineered monolayer transistor architecture that takes advantage of MXenes’ natural material chemistry to offer low-resistive contacts. They design an automated, high-throughput computational pipeline that first performs hybrid density functional theory-based calculations to find 16 sets of complementary transistor configurations by screening more than 23,000 materials from an MXene database and then conducts self-consistent quantum transport calculations to simulate their current-voltage characteristics for channel lengths ranging from 10 nm to 3 nm. Performance of these devices has been found to meet the requirements of the international roadmap for devices and systems (IRDS) for several benchmark metrics (on current, power dissipation, delay, and subthreshold swing). The proposed balanced-mode, functional-engineered MXene transistors may lead to a realistic solution for the sub-decananometer technology scaling by enabling doping-free intrinsically low contact resistance.

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